1. Field of the Invention
The present invention relates to a method of manufacturing a multilevel interconnect structure, a multilevel interconnect structure, a transistor device, and an image display.
2. Description of the Related Art
Conventional semiconductor devices having transistors and diodes on their substrates or semiconductor wafers often use multilevel interconnect structures to increase integration density. In the multilevel interconnect structure, an interlayer insulating film is used that has a via hole to provide electrical connection between interconnect lines.
In recent years, insulating materials, such as, e.g., porous silica films, fluorinated silicon oxide films and organic insulating films of silicon and oxygen with methyl group, that have lower relative permittivity than conventional silicon oxide films, have become increasingly popular as the material of the interlayer insulating film. Among these, commonly used are the organic insulating films having low permittivity (of about 2.2-4.0).
However, because a photolithographic technique is used for forming through holes in the organic insulating film, the number of manufacturing steps is increased, and therefor use of the organic insulating film is disadvantageous in terms of cost.
A screen printing method is a printing method that deposits ink onto a mesh (screen printing mask) having an ink non-ejection region, on which an emulsion is disposed to prevent passage of ink, and forces the ink through the mesh by sliding a squeegee. This method is advantageous because it can reduce manufacturing steps and has higher material usage efficiency. The screen printing method is capable of forming fine patterns with simple techniques and therefore has recently been used for forming interconnects in transistors and the like. However, the surface of just-printed ink still having fluidity becomes flat due to gravity, causing a slight blur. This slight blur is highly likely to fill a small through hole. Thus, a through hole of 100 μm square is the smallest size achievable by the conventional printing method. Moreover, the screen printing method is affected by multiple parameters such as a clearance (the distance between a screen mask and a substrate), the angle of the squeegee, pressure, and speed, and it is therefore difficult to stably produce small through holes. In the case of large area printing, the smallest size that has been actually achieved is about 300 μm square.
Japanese Patent Laid-Open Publication No. 2006-120873 discloses a method of manufacturing an impedance-controlled wiring board. According to this method, after a conical conductive bump is formed on a metal foil by screen printing, an insulator is deposited over the conductive bump such that the conductive bump extends through the insulator. Then, a metal foil is deposited over the insulator to be in electric connection with the head of the conductive bump. The problem with this method is that, because the insulator is formed by heating and pressing prepreg, the material of the insulator is limited, and loads due to heat and pressure are imposed on the insulator. The smallest size of the conductive bump achieved in one embodiment is 150 μm, and the possibility of reducing the size of the conductive bump is not mentioned.